Datasheet Summary
Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB)
Key Features
- 10 to 220 MHz operating frequency range
- Low output clock skew: 45ps-typ
- Low output clock jitter:
25 ps-typ cycle-to-cycle jitter 15 ps-typ period jitter
- Low part-to-part output skew: 90 ps-typ
- Wide 2.5 V to 3.3 V power supply range
- Low power dissipation: 20 mA-max at 66 MHz and VDD=3.3 V 18 mA-max at 66 MHz and VDD=2.5V
- One input drives 8 outputs
- Multiple configurations and drive options
- Select mode to bypass PLL or tri-state outputs
- SpreadThru™ PLL that allows use of SSCG
- Available in 16-pin SOIC and TSSOP packages
- Available in mercial and Industrial grades
Applications
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